Provides indirect read and write access to the base address of the MPU region selected by MPU_RNR[7:2]:(2[1:0]) `FTSSS
XN | Defines whether code can be executed from this region |
AP | Defines the access permissions for this region |
SH | Defines the Shareability domain of this region for Normal memory |
BASE | Contains bits [31:5] of the lower inclusive limit of the selected MPU memory region. This value is zero extended to provide the base address to be checked against |